Embedded Systems Case Study Topics

We at TopicSuggestions see embedded systems steering cars, pacing hearts, running factory lines, and sensing cities, all while meeting strict real‑time, power, and memory limits. We work with students who need concrete, high‑impact case studies to practice analysis, implementation, and evaluation, and we know that choosing the right topic is often harder than building the prototype. Today we will come up with some Embedded Systems Case Study ideas for you. We will share a concise set of case study topics that are practical, researchable, and aligned with current industry and academic trends.

Case Study Topic Ideas on Embedded Systems

We will organize them by domain (automotive, healthcare, IoT, aerospace, industrial), by technique (RTOS scheduling, low‑power design, safety and security, verification), and by complexity (intro to advanced), and we will note for each one a system context, a research angle, and expected outcomes to guide your project.

1. Facade-integrated morphing micro-turbine arrays driven by boundary-layer sensing electroactive polymers

– We ask how we can couple shear-stress sensing to distributed blade reconfiguration to maximize net energy while maintaining aeroelastic stability?
– We test whether urban canyon turbulence spectra and facade curvature induce synchronization or destructive interference across turbine arrays?
– We investigate how we can model lifetime degradation of electroactive polymers under UV, soiling, and rain-induced loading to forecast maintenance intervals?
– We explore how we can co-optimize aeroelastic morphing, power electronics, and structural reliability to achieve grid-relevant capacity factors?

2. Self-healing tribological coatings that harvest ambient dust as a sacrificial lubricant for desert wind turbines

– We ask how we can engineer microtextures and surface chemistry to selectively capture and compact silica particulates into a load-bearing transfer film?
– We test whether contact-temperature-driven sintering of captured particles can reduce wear without raising friction beyond turbine efficiency thresholds?
– We investigate how we can model sand morphology, humidity, and wind-borne contamination as inputs to predict coating self-replenishment rates?
– We explore whether we can design multi-layer architectures that release captured particulates on demand to avoid abrasive third-body buildup?

3. Acoustic-metamaterial coolant lines that suppress cavitation in high-speed pumps via phase-tailored bubble nucleation

– We ask how we can embed resonant cavities to reshape pressure wavefields and elevate local nucleation thresholds without incurring pressure drop penalties?
– We explore whether we can couple lattice Boltzmann flow models with structural acoustics to predict cavitation inception under transient loading?
– We test how we can validate cavitation suppression on turbopump surrogates using synchronized high-speed imaging and acoustic emission?
– We investigate whether we can actively tune resonator states to adapt to variable fluid properties, temperature, and dissolved gas content?

4. Heat exchangers co-designed with embedded microalgae for simultaneous CO2 capture and waste-heat utilization

– We ask how we can jointly optimize light paths, flow shear, and thermal gradients to maximize algal growth and convective heat transfer?
– We investigate whether we can develop anti-fouling textures that sustain biofilm productivity while controlling pressure drop over multi-week operation?
– We test how we can implement reinforcement learning to schedule illumination and flow pulsation for peak net carbon capture per pumping watt?
– We explore whether we can quantify life-cycle benefits relative to conventional cooling towers when integrated into industrial flue streams?

5. Soft robotic vibration isolators that reconfigure lattice stiffness using ferrofluid-filled channels under magnetic fields

– We ask how we can map magnetic field strength and channel topology to macro-scale stiffness and damping bandwidths for precision payloads?
– We investigate whether we can achieve rapid stiffness switching without hysteresis that destabilizes isolation control loops?
– We test how we can model fatigue, particle migration, and leakage in cyclic multiaxial vibration environments typical of launch and re-entry?
– We explore whether we can embed distributed sensors to close the loop on transmissibility targets under changing disturbance spectra?

6. In-situ ultrasonic weaving of carbon nanotube aerogels into metal additive manufacturing to create percolating thermal highways

– We ask how we can synchronize ultrasonic fields during laser powder bed fusion to align and anchor CNT aerogels within melt pools?
– We investigate whether we can achieve anisotropic thermal conductivity that reduces residual stresses and warpage without embrittling the matrix?
– We test how we can characterize interfacial bonding, oxidation kinetics, and microstructural stability through thermal cycles?
– We explore whether we can design process windows that preserve electrical percolation for integrated health monitoring in printed parts?

7. Swarm microrobots as active Lagrangian tracers for opaque slurry flows in industrial mixers

– We ask how we can design density-matched, magnetically actuated microrobots that track flow without perturbing rheology?
– We investigate whether we can reconstruct 3D velocity fields from distributed robot trajectories using SLAM-like estimators adapted to fluids?
– We test how we can quantify and correct tracer-induced bias in yield-stress and thixotropic media under shear localization?
– We explore whether we can use cooperative control to probe rare events like dead zones, segregated bands, and intermittent vortices?

8. Electrostatic granular-jamming brakes for ultra-fast stopping of high-speed spindles

– We ask how we can design dielectric particle beds and electrode geometries that achieve millisecond jamming transitions at safe voltages?
– We investigate whether we can model heat generation and charge decay during rapid engage-disengage cycles to prevent thermal runaway?
– We test how we can scale braking torque with particle size distribution, surface treatments, and packing fraction while maintaining repeatability?
– We explore whether we can outperform magnetorheological brakes on response time and specific torque in compact form factors?

9. Human-in-the-loop haptic teleoperation for on-orbit assembly using shared impedance fields from predictive finite element twins

– We ask how we can fuse real-time FE predictive twins with operator intent to generate haptic guidance that prevents elastic instability?
– We investigate whether we can maintain task performance under variable communication delays by adapting impedance fields on the edge?
– We test how we can quantify operator learning curves and cognitive load when guidance fields reshape perceived task dynamics?
– We explore whether we can generalize the approach across flexible truss topologies without retuning by leveraging modal subspace models?

10. Thermally adaptive aerofoils with phase-change lattice cores that morph camber during icing events

– We ask how we can design lattice-PCM architectures that exploit volumetric expansion to recontour aerofoils for passive de-icing?
– We investigate whether we can maintain aeroelastic stability during phase transitions under gust loading and temperature gradients?
– We test how we can control heating profiles to trigger targeted phase change that clears accreted ice while preserving lift-to-drag?
– We explore whether we can integrate health monitoring to predict PCM aging, leakage, and structural fatigue over flight cycles?

11. Energy-Adaptive Real-Time Scheduler for Intermittently-Powered Sensor Nodes

We frame research questions: How can we design a scheduler that adapts task granularity and fidelity in real time to unpredictable ambient energy; how do we quantify deadlines and correctness under power interruptions; how do we formally verify graceful degradation properties? We outline how to work: We will build a prototype node with supercapacitor and energy-harvesting front end, implement a scheduler that monitors energy state and dynamically adjusts task checkpoints and sampling fidelity, and evaluate using trace-driven emulation and formal model checking for safety properties.

12. Privacy-Preserving Wearable Fusion at the Edge Using Homomorphic Compression

We pose research questions: How can we compress and fuse multi-modal biometric signals on-device such that downstream cloud inference cannot reconstruct raw signals; what homomorphic-friendly compression transforms retain utility for machine learning; how do we bound privacy-utility trade-offs with hardware constraints? We outline how to work: We will design light-weight compression transforms amenable to partial homomorphic operations, implement them on a low-power MCU with an accelerometer/PPG/IMU suite, measure inference accuracy on encrypted-compressed features, and quantify reconstruction risk with adversarial reconstruction experiments.

13. Fault-Tolerant Neural Accelerators Using Stochastic Redundancy for Safety-Critical Embedded Control

We ask research questions: How can stochastic redundancy and probabilistic voting mitigate soft errors in tiny neural accelerators used for control loops; what are the latency/energy bounds needed for provable closed-loop stability; how do we trade model sparsity against redundant execution? We outline how to work: We will modify an embedded accelerator to run multiple lightweight stochastic ensembles, develop probabilistic voting kernels, test on control benchmarks (e.g., quadrotor attitude control) under injected faults, and analyze stability using Lyapunov-inspired metrics.

14. Context-Aware Secure Bootstrapping for Modular Plug-and-Play IoT Peripherals

We frame research questions: How can a hub determine trustworthiness of a newly attached peripheral using behavioral fingerprints instead of pre-shared keys; how do we limit attack surface during the dynamic bootstrapping handshake; what lightweight attestation primitives suffice for modular device ecosystems? We outline how to work: We will create a modular peripheral testbed (sensors/actuators), develop behavior-based fingerprinting and a minimal crypto handshake that uses ephemeral context-derived keys, run adversarial attachment experiments, and measure latency, false acceptance/rejection rates, and energy overhead.

15. Ultra-Low-Latency Haptics over Deterministic Embedded Networks for Teleoperation

We ask research questions: Which network-layer scheduling and compression schemes achieve sub-1ms end-to-end haptic fidelity on resource-constrained embedded switches; how can we maintain perceived stability under jitter and packet loss; what hardware-software co-designs minimize worst-case latency? We outline how to work: We will build an embedded deterministic network (time-triggered switches and MCUs), implement haptic codecs with graceful degradation, perform human-subject closed-loop teleoperation tests under controlled network impairments, and analyze perception thresholds and control stability.

16. On-Chip Federated Learning Coordinator for Cross-Device Concept Drift in Embedded Fleets

We pose research questions: How can a compact, verifiable coordinator on constrained hardware manage federated updates across devices experiencing non-stationary environments; how do we detect and adapt to concept drift with minimal communication; how do we provide robustness to malicious peers? We outline how to work: We will implement a microcontroller-based coordinator that orchestrates compressed model exchanges and drift detection heuristics, simulate federated scenarios with synthetic and field-collected drift traces, and evaluate convergence, communication cost, and robustness to label flips.

17. Acoustic Channel-Based Secure Key Exchange for Far-Edge Embedded Clusters

We pose research questions: Can we establish ephemeral symmetric keys between co-located embedded devices using physical-layer acoustic reciprocity with sub-10kHz hardware; what mechanisms mitigate eavesdropping and relay attacks in reverberant environments; how do we integrate the method into constrained TLS-like stacks? We outline how to work: We will prototype key exchange using low-frequency speakers/mics on MCUs, design signal processing to extract reciprocal channel features, test secrecy against passive/active adversaries, and integrate key material into light TLS stacks for service authentication.

18. Dynamic Thermal-Aware Code Morphing for Performance-Guaranteed Embedded Vision

We ask research questions: How can on-device just-in-time code morphing adapt vision pipeline complexity to thermal headroom while guaranteeing frame-rate and bounded latency; what predictive thermal models are compact enough for real-time decisions; how do we ensure image-quality SLAs under thermal throttling? We outline how to work: We will instrument an embedded vision platform with thermal sensors, implement a runtime that swaps algorithmic kernels and parameterizations based on predicted temperature and workload, benchmark on object-tracking tasks, and measure QoS, thermal cycles, and energy.

19. Adaptive Bio-Sensing Front-Ends Using Closed-Loop Electrode Impedance Control

We pose research questions: Can embedded front-ends dynamically tune stimulation/readout parameters by measuring electrode impedance in situ to maximize SNR and longevity; how do we model electrode-skin/tissue dynamics for control; what low-power circuits enable safe closed-loop adjustment? We outline how to work: We will design a front-end that periodically characterizes impedance and adjusts bias/stimulation waveforms, validate on simulated and in-vivo-like phantoms, and assess improvements in signal quality, electrode wear, and safety margins.

20. Ethical Constraint Engines for Autonomous Embedded Agents in Shared Spaces

We ask research questions: How can we encode context-sensitive ethical constraints compactly for embedded agents (robots/drones) that must respect human norms in shared spaces; how do we verify and enforce constraints in real time under sensing uncertainty; what minimalist reasoning primitives suffice to avoid harmful behaviors? We outline how to work: We will formalize a constraint language suitable for MCUs, implement a runtime verifier that consumes sensor inputs with uncertainty models, test on navigation and manipulation tasks in human-populated mockups, and measure constraint compliance, false positives, and real-time overhead.

21. Adaptive Energy-Aware Microcontroller Scheduling for Intermittent Energy Harvesting Nodes

We frame research questions about how microcontroller task schedulers can dynamically adapt to unpredictable energy inflow and storage constraints: We ask how to predict near-term harvestable energy on-node, how to prioritize tasks to maximize useful work under intermittent power, and how to bound task latency under frequent brownouts. We describe a short overview of how to work on this: We design lightweight online predictors, implement a scheduler policy in an RTOS on representative MCU platforms, emulate intermittent energy traces in hardware-in-the-loop, and evaluate task completion, latency, and energy efficiency against baselines.

22. Secure Over-the-Air Microkernel Patch Distribution for Implantable Medical Devices

We pose research questions about delivering authenticated, minimal-size microkernel patches to deeply resource-limited medical implants: We ask how to minimize cryptographic and bandwidth cost of integrity/authenticity proofs, how to ensure safe rollback and atomic patch application under constrained memory, and how to demonstrate fail-safe behavior under power loss. We outline how to work on this: We prototype a compact patch format and cryptographic scheme, implement an OTA updater on an implant-class testbed, conduct formal safety checks for atomicity, and perform adversarial and fault-injection experiments.

23. Explainable Anomaly Detection on Constrained Edge Nodes for Industrial Control

We raise research questions about producing human-interpretable anomaly explanations from lightweight models running on PLC-class hardware: We ask which explanation primitives are both useful to operators and feasible on constrained CPUs, how to quantify explanation fidelity given model compression, and how to integrate explanations into alarm prioritization. We give a short overview of how to work on this: We adapt interpretable models (e.g., rule-based or attention-sparse networks) to embedded hardware, build a synthetic and recorded industrial dataset, measure detection/explanation trade-offs, and conduct user studies with control-room engineers.

24. Formal Verification of Mixed-Criticality RTOS Schedulers under Thermal and Power Constraints

We formulate research questions about proving temporal guarantees of mixed-criticality schedulers when CPU frequency throttling and thermal limits force dynamic mode changes: We ask how to model thermal dynamics in scheduling proofs, how to guarantee high-criticality task deadlines under temperature-induced frequency reduction, and how to create compositional verification artifacts. We summarize how to work on this: We develop a formal model combining scheduling theory and thermal transient models, use model checking or theorem proving to derive worst-case bounds, and validate results against an RTOS port on hardware with programmable thermal profiles.

25. Time-Synchronized Multi-Modal Sensor Fusion in Low-Power Wearables with Intermittent Connectivity

We ask research questions about maintaining accurate sensor fusion (IMU, PPG, audio) across duty-cycled sensors and intermittent Bluetooth/edge sync: We ask how to compensate for asynchronous sampling and variable latency while preserving power budgets, how to estimate and correct clock drift on cheap oscillators, and how to quantify end-to-end fusion accuracy given sync strategies. We describe how to work on this: We implement lightweight synchronization protocols, build fusion pipelines tolerant to missing data, run controlled human-subject and bench experiments, and report trade-offs between power, latency, and fusion quality.

26. Blockchain-Assisted Trust Bootstrapping for Intermittently-Connected IoT Devices

We interrogate research questions about using distributed ledger primitives to bootstrap trust and verify device history for IoT nodes that are often offline or behind NATs: We ask how to design succinct proofs of provenance suitable for MCUs, how to handle long offline intervals and ledger pruning, and how to mitigate ledger synchronization attacks on intermittent devices. We explain how to work on this: We design compact attestation/receipt structures, simulate ledger interactions with offline periods, implement a lightweight client on constrained hardware, and evaluate security, bandwidth, and convergence properties.

27. Neural Architecture Compression for Deterministic Inference on Safety-Critical Edge Controllers

We propose research questions about compressing neural controllers while preserving deterministic worst-case execution time (WCET) and control stability: We ask how to map pruning/quantization to provable WCET bounds, how to certify control loop stability after compression, and how to trade model accuracy for schedulability. We outline how to work on this: We combine model compression techniques with static-timing analysis, validate closed-loop behavior in simulation and on real-time hardware, and report certified latency and stability guarantees alongside control performance metrics.

28. Distributed Microcontroller Consensus with Energy-Aware Gossip for Environmental Sensor Meshes

We present research questions about achieving lightweight, consistent state agreement in sensor meshes where nodes sleep to conserve energy: We ask how to design gossip protocols that adapt message frequency to individual energy budgets, how to bound consistency convergence under duty cycling, and how to handle node churn and partition reconnection. We indicate how to work on this: We design energy-adaptive gossip rules, implement them on low-power radio stacks, run large-scale network emulations and outdoor deployments, and measure consistency, latency, and energy consumption.

29. Hardware-Software Co-Design for Real-Time Reconfigurable RF-Sensing Nodes with On-Device ML

We consider research questions about co-designing RF front-ends and embedded ML pipelines to perform real-time spectrum-aware sensing and classification on a single node: We ask how to partition signal processing between FPGA-like fabric and CPU to meet latency and power targets, how to enable safe reconfiguration at runtime, and how to evaluate detection reliability under mobility. We sketch how to work on this: We prototype a reconfigurable RF-SoC pipeline, implement adaptive ML models for classification, perform latency/power/accuracy trade-off studies, and run mobility experiments in varied RF environments.

30. Privacy-Preserving Federated Learning for Heterogeneous Embedded Devices with Intermittent Participation

We formulate research questions about enabling federated learning across heterogeneous embedded devices where participants join sporadically and have varied compute and privacy constraints: We ask how to design aggregation algorithms robust to long-tail participant availability, how to apply differential privacy with minimal utility loss on tiny models, and how to adaptively allocate computation across devices. We detail how to work on this: We build a federated simulation with realistic device heterogeneity and participation traces, implement privacy mechanisms tuned for small models, measure global model convergence and utility, and analyze trade-offs between privacy, latency, and fairness.

31. Energy-adaptive TinyML Pipelines for Intermittent-Energy Devices

We (TopicSuggestions) propose studying how to partition and schedule TinyML inference pipelines across unpredictable energy availability. We ask: How do we decompose models into micro-kernels that gracefully degrade accuracy under energy interruptions? How do we predict near-term harvestable energy to guide on-device model selection? How do we design checkpointing and state-compression schemes that minimize recomputation after power loss? We will build lightweight schedulers and modular model kernels, simulate energy traces from real harvesters, implement on an energy-harvesting MCU platform, and evaluate accuracy-versus-availability trade-offs and end-to-end task latency.

32. Hardware-rooted Privacy Policy Enforcement for MCU-class Devices

We (TopicSuggestions) explore enforcing user-configurable privacy policies at the hardware/firmware boundary on resource-constrained microcontrollers. We ask: How do we design a minimal policy engine that maps high-level privacy rules to hardware-enforced I/O constraints? How do we prevent covert channels on buses and peripherals while preserving real-time guarantees? How do we verify policy compliance with low-overhead attestation? We will design a compact policy interpreter integrated with MCU peripheral controllers, formalize policy-to-hardware translations, prototype on open-hardware MCU designs, and evaluate overhead, security (via red-team tests), and real-time impact.

33. Analog-Digital Sensor Fusion Circuits for Edge ML with On-chip Preprocessing

We (TopicSuggestions) investigate mixed-signal architectures that perform analog-domain feature extraction to reduce ADC/compute load for edge ML. We ask: Which analog transforms (correlation, envelope, neural-like kernels) best preserve task-relevant information while minimizing digitization rate? How do we co-design learning algorithms to tolerate analog non-idealities and drift? How do we calibrate or train with limited labeled data? We will co-design analog front-end circuits and quantized models, build simulated and silicon-prototype variants, run joint hardware-aware training, and measure power, bandwidth, robustness to noise, and lifecycle calibration needs.

34. Formal Verification of Self-healing Firmware Update Protocols Under Supply Variability

We (TopicSuggestions) study formally provable firmware update protocols that guarantee safe rollbacks and recovery even when devices experience brownouts or fluctuating supply during the update. We ask: What minimal invariants ensure atomicity of firmware replacement on wear-limited flash? How do we model supply interruptions and block-device failures in formal proofs? How do we implement recovery primitives with constrained bootloaders? We will formalize the update state machine in a theorem prover, derive invariants, synthesize minimal recovery code sequences, and validate via fault-injection on representative embedded platforms.

35. Quantum-Inspired Annealing Coprocessor Integration with Microcontrollers for Combinatorial Edge Tasks

We (TopicSuggestions) propose integrating a low-power quantum-inspired annealing coprocessor with MCUs for near-optimal scheduling and routing at the edge. We ask: Which classes of combinatorial problems at the edge yield practical gains from annealing-style accelerators? How do we map problem formulations to sparse, low-precision couplers under area/power constraints? How do we manage latency and energy amortization when coupling to soft real-time control loops? We will develop co-processor APIs, implement mapping heuristics, simulate co-execution with realistic workloads (scheduling, sensor fusion, path planning), and manufacture FPGA prototypes to measure solution quality, latency, and energy cost per problem.

36. Bioelectronic Closed-loop Embedded Implants with Event-driven Power Management

We (TopicSuggestions) research ultra-low-power closed-loop implantable controllers that detect bio-events and activate therapeutic stimulation while remaining dormant most of the time. We ask: How do we design event-detection hardware that trades negligible standby power for high specificity? How do we guarantee stimulation safety during transient supply or communication loss? How do we validate long-term biological compatibility of on-chip power modes? We will design analog event detectors, model safety interlocks, create implant prototypes using medical-grade SoCs, run benchtop and animal-model tests for event detection specificity, and evaluate power budgets and failure modes.

37. Compressed Provenance Fingerprinting for Firmware Lineage on ROM-limited Devices

We (TopicSuggestions) introduce compact provenance fingerprints stored in immutable ROM regions to trace firmware origin and update history on constrained devices. We ask: How do we compress provenance graphs into verifiable fingerprints that resist collision and tampering? How do we append provenance cheaply across OTA updates without bloating flash? How do we reconcile provenance continuity under factory resets and hardware re-flashes? We will design fingerprinting schemes combining Merkle-like summaries and delta encodings, implement tiny verification routines, analyze cryptographic and storage trade-offs, and test chains across update scenarios with adversarial manipulations.

38. Real-time Cross-domain Resource Arbitration for Mixed-criticality Wireless Sensor-Actuator Networks Using Lightweight RL

We (TopicSuggestions) examine reinforcement-learning arbitration agents running within gateways or nodes to allocate radio, compute, and actuator resources across mixed-criticality tasks in wireless cyber-physical systems. We ask: How do we design RL agents that respect hard real-time constraints and safety envelopes? How do we represent state compactly for MCU-scale inference? How do we guarantee learning stability under distribution shift and adversarial loads? We will design safety-constrained RL formulations, implement distillation into tiny policy networks, perform hardware-in-the-loop training with realistic sensor-actuator traces, and measure deadline miss rates, control performance, and adaptivity to changing loads.

39. Adaptive Firmware Lifespan Management for Reducing E-waste in Agricultural IoT Deployments

We (TopicSuggestions) target firmware strategies that extend device lifespan by adapting features and maintenance schedules depending on environmental degradation and repairability in the field. We ask: How do we detect hardware aging and tailor firmware to degrade gracefully while preserving essential functions? How do we schedule non-invasive updates that respect farmer maintenance windows and connectivity costs? How do we quantify lifecycle emissions saved by adaptive firmware policies? We will instrument deployed nodes to collect failure/aging telemetry, develop adaptive feature-scaling firmware, simulate lifecycle models including repair/upgrade behaviors, and run pilot deployments to measure uptime, functionality retention, and projected e-waste reduction.

40. Secure OTA Provenance Attestation Using PUF Drift Modeling on Resource-constrained Devices

We (TopicSuggestions) propose attestation schemes that combine physical unclonable functions (PUFs) with drift-aware models to maintain secure provenance over many years despite aging and environmental drift. We ask: How do we model PUF response drift to avoid false rejects while preventing replay or cloning attacks? How do we perform lightweight on-device drift compensation without exposing helper-data attacks? How do we integrate this into OTA pipelines so that provenance remains verifiable across multiple update generations? We will characterize PUF drift under temperature/aging, develop compact drift-model encodings and secure helper-data protocols, implement attestation primitives on constrained MCUs, and validate robustness and attack-resilience in long-term emulation experiments.

41. Adaptive thermal-aware scheduling for battery-free implantable sensors

We (Team TopicSuggestions) ask: How can we model temperature-dependent energy harvesting and tissue-safety constraints to schedule sensing and wireless bursts?; How do we guarantee data freshness while bound by intermittent operation and thermal limits?; How can we validate safety in-vivo or with high-fidelity phantoms? Overview: We build a thermal–energy co-simulator combining electromagnetic/thermal models of tissue, empirical energy-harvester traces, and an intermittent RTOS scheduler; we implement prototypes on battery-free harvesters, run bench and phantom experiments, and evaluate latency, duty cycle, and tissue temperature against safety thresholds.

42. Composable real-time assurance for heterogeneous MCU+FPGA embedded platforms

We (Team TopicSuggestions) ask: How can we provide end-to-end temporal guarantees when tasks move between soft-cores in FPGA fabric and fixed-function cores?; What compositional certification artifacts (bounds, contracts) are needed for modular verification?; How to automate synthesis of minimal runtime monitors that preserve real-time properties? Overview: We specify component timing contracts, build a co-simulation framework linking hardware timing models and RTOS kernels, synthesize runtime monitors from contracts, and validate with heterogeneous case studies (sensor fusion, motor control) measuring worst-case latencies and monitor overhead.

43. Self-healing firmware via runtime causal tracing and micro-checkpointing

We (Team TopicSuggestions) ask: Can we autonomously detect and repair transient software faults in constrained devices with minimal memory and energy?; How to identify causal fault chains in devices lacking MMUs and complex debuggers?; What are safe rollback and repair strategies that avoid repeated failures? Overview: We design lightweight causal tracing hooks, implement micro-checkpointing and selective state rewind, develop a small rule-based repair engine, and evaluate with injected faults and long-run field emulation to measure recovery rate, energy cost, and false-repair rates.

44. Privacy-preserving sensing pipelines on constrained IoT using homomorphic-lite primitives

We (Team TopicSuggestions) ask: How can we implement practical, partial-homomorphic operations (sum, dot-product) on microcontrollers while respecting memory and latency limits?; What trade-offs between quantization, encryption parameters, and application utility exist?; How to integrate with streaming ML on-device to avoid raw-data exposure? Overview: We prototype optimized fixed-point homomorphic kernels, co-design quantization-aware models that operate on encrypted features, benchmark across tasks (audio, occupancy), and measure utility-privacy trade-offs, CPU cycles, and energy.

45. Co-design of quantized neural networks with analog-in-memory compute for microcontrollers

We (Team TopicSuggestions) ask: How to jointly train networks that tolerate analog compute non-idealities and extremely low precision suitable for ultra-low-power embedded accelerators?; What calibration and retraining loops are needed at deployment with device variability?; How to quantify end-to-end accuracy vs. energy and latency on real analog-in-memory prototypes? Overview: We create a simulation-aware training pipeline that injects device noise models, implement calibration-aware quantization, test on hardware-in-the-loop analog-in-memory boards, and report accuracy, energy-per-inference, and robustness to drift.

46. Secure ad-hoc bootstrapping for disposable sensor swarms using PUF+ultrasonic NFC

We (Team TopicSuggestions) ask: Can we establish secure keys and provenance for large numbers of low-cost, disposable sensors without pre-provisioning?; How robust are PUF-derived keys under manufacturing variance and environmental stress?; Can short-range ultrasonic NFC be used for out-of-band authentication at scale? Overview: We design a bootstrap protocol combining PUF-based identity extraction with ultrasonic proximity exchange for key agreement, fabricate low-cost prototypes, conduct scale emulation of swarm onboarding, and measure success rates, false-rejects, and energy per bootstrap.

47. Time-predictable wireless coexistence layer for deterministic TSN over long-range low-power links

We (Team TopicSuggestions) ask: How to extend Time-Sensitive Networking (TSN) determinism to constrained long-range low-power links (e.g., LoRa, Sigfox) with duty-cycle and listen-before-talk constraints?; What scheduling abstractions and admission control enable bounded latency under interference?; How to validate on mixed wired/wireless industrial topologies? Overview: We propose a coexistence layer that models airtime reservations, implement a scheduler and admission controller on gateway+endnode stacks, run mixed-traffic emulations with interference traces, and quantify latency bounds, jitter, and throughput under regulatory constraints.

48. Energy-aware fault-injection mapping to improve tinyML resilience

We (Team TopicSuggestions) ask: How to map rare hardware faults (bit-flips, RF glitches) to expected model degradations and selectively harden the most impactful weights/activations?; Can we trade small energy overheads for large gains in model reliability in deployment?; How to automate placement of redundancy or error detection in tinyML pipelines? Overview: We build an energy-aware fault-emulation toolkit that injects faults in weight storage and activation paths, correlate faults to application-level metrics, use an automated optimizer to place ECC, replication, or voting where it yields maximal reliability-per-joule, and validate on TinyML benchmarks.

49. Formal synthesis of minimal schedulers for event-triggered control loops on constrained RTOSes

We (Team TopicSuggestions) ask: Can we automatically synthesize the smallest scheduler (fewest context switches and timers) that still guarantees control stability and deadline satisfaction for a set of event-triggered loops?; What formal properties are required to encode on-device and how scalable are synthesis techniques?; How to integrate synthesized schedulers into existing RTOS footprints? Overview: We formalize control and timing specifications, use SMT/ILP-based synthesis to produce compact scheduler code and timer assignments, embed into a minimal RTOS, and empirically verify closed-loop stability, CPU utilization, and memory footprint on real controllers.

50. Compiler-driven sensor-actuator provenance tracking for regulatory compliance in embedded devices

We (Team TopicSuggestions) ask: How can we statically and dynamically track data provenance from sensors to actuator commands in deeply embedded systems with minimal runtime overhead?; What compiler analyses and lightweight runtime tags are sufficient to produce auditable trails required by safety and privacy regulations?; How to compress and verify provenance proofs for intermittent connectivity devices? Overview: We extend a compiler to propagate provenance metadata, generate succinct cryptographic attestations and compressed event logs, implement a low-overhead runtime tag manager, test on control and monitoring applications, and evaluate provenance completeness, storage, and verification costs.